The author of this product has granted you a license to use this product, subject to the following conditions. By possessing, using, or attempting to use this product, you assume all liability for its use. You agree never to take legal action, civil or criminal, against its author for any reason. You may redistribute this product in its original form only. You may not charge money for distribution of the product, unless all such charges are remitted to the author immediately upon payment.
The author retains ownership of all intellectual properties embodied in this product. This is a "patch" that can be applied to computers in order to solve problems with the computer's PCI bus.
This patch is designed for computers whose chipset was made by VIA. You can discover the maker of your computer's chipset by downloading and running CPUZ from www. The changes made by this product are temporary. The computer's chipset erases all changes automatically when being restarted, so the "patch" program must reapply the changes each time Windows is started. On the other hand, the latency timer also prevents one device from making exclusive use of the bus for too long.
After the PCI latency during one burst has passed, every other device can request usage of the bus. The burst is then cancelled immediately. One typical BIOS-default is 32 clocks. Register 0D. Register 76, bits 4 and 5, and bit 7 on older chipsets. We did a quick cross check with this patch using the Promise Ultra TX2 and a few motherboards. It all resulted in better burst transfers.
As burst transfers are still not en par with Intel chips they still are 32 per cent higher now than without the patch. Checking the PCI timing with the logic analyzer we found that now bursts with VIA chipsets transferred 32 packets of data. Only then the bus is released. Without the patch, this was only 24 packets of data. These longer bursts explain the increase in performance. Playing around with the patch a little more we found that even audio applications can gain a great benefit from it.
If it is set to zero then the timer is disabled. Normally, when the patch sets this value to a non-zero value, the patch will leave this value alone in the chipset if the chipset's timer is already set to a higher value. This behavior can be overridden. If this registry entry is absent, or if its value is set to sixteen or higher, then the PCI arbitration timer will not be changed. If this is set to zero, the patch will not force the value into the chipset if the chipset already has a higher value and the registry value is non-zero.
All mass-storage controllers will have their PCI latency register 0D set to this value, unless the controller's register is already set to a higher value. Higher values are better for performance of the mass-storage controller. If the value is set too high then other PCI devices can experience problems. All other devices having a PCI class of 1 will be set.
If this value is not specified then no boost will be done, except for any boost specified in the default patch settings when PatchMethod is set to 2. This is a boost that is applied to all sound devices in the computer. All sound devices will have their PCI latency register set to this value, unless the device's register is already set to a higher value.
Higher values are better for performance of the sound device. VIA's AC97 audio controllers are not changed by this setting. All other devices having a PCI class of 4 will be set. If a value is specified for CreativeBoost in the registry, then it will be used for Creative and Ensoniq devices. If not, then this value will be used.
If this value is not specified then no boost will be done, except for any boost specified in the default patch settings when PatchMethod is set to two. This is a boost that is applied to all Creative- and Ensoniq-branded sound devices in the computer. All of these sound devices will have their PCI latency register set to this value, unless the device's register is already set to a higher value. If this value is not specified then no boost will be done, except for any boost specified in either SoundBoost or in the default patch settings when PatchMethod is set to 2.
These settings allow fine-tuning of the PCI registers of the chipset. Registers 70, 71, 72, 73, 74, and 76 are supported. Some of the other registry settings also adjust these same registers.
The registers named "fl "' contain binary flags. When a binary bit is set to one in "fl ", the corresponding bit in the 'Rx ' value will be applied to the chipset's register. If a bit in 'fl ' is set to zero then the bit in 'Rx ' will not be used.
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